How Many Quantum Computers Exist in 2026? Verified Count

1 Jun, 2026

Introduction

Production engineering teams evaluating quantum-ready security postures and R&D roadmaps face a critical intelligence gap: no authoritative registry of operational quantum computers exists, and vendor claims conflate prototype chips, cloud-accessible time slices, and fully programmable systems. Our verified 2026 quantum computer registry addresses this gap directly, delivering a taxonomy-grounded count of quantum computers worldwide as of 2026, defining what qualifies as a "quantum computer" versus marketing collateral, and providing decision-grade market intelligence for enterprise architects.

Failure scenario: A Fortune 500 CISO directed $2.3M toward "quantum threat assessment" in 2024 based on a vendor's claim of "50+ quantum computers deployed." The vendor counted every dilution refrigerator and annealing sampler as a "computer." The resulting risk model overstated cryptanalytic capability by 18–24 months, misallocating post-quantum migration budget and leaving RSA-2048 dependencies unpatched. Precision in definitions is not pedantry—it is due diligence.

Executive Summary

TL;DR: As of mid-2026, approximately 35–42 fully programmable, gate-model quantum computers with ≥20 logical or ≥100 physical qubits operate globally across institutional and cloud-accessible deployments; expanding to all quantum processing units (QPUs) including annealers, simulators, and sub-threshold prototypes yields 200–270 systems, but only a subset meets engineering-relevant definitions of general-purpose quantum computation.

Definition is destiny: "Quantum computer" counts vary 10× depending on whether you include annealers, simulators, cloud time-sliced access, and sub-20-qubit prototypes.
Gate-model systems with error correction or mitigation: ~35–42 operational globally (IBM, Google, Rigetti, IonQ, Quantinuum, Alice & Bob, Pasqal, QuEra, others).
Quantum annealers: D-Wave operates ~15 Advantage and Zephyr-generation systems; these are application-specific, not general-purpose.
Cloud-accessible vs. physical: IBM's ~20+ "systems" include time-sliced access to shared hardware; physical distinct processors number fewer.
China's state programs: Estimated 6–10 superconducting and photonic systems at ≥100 qubits; opacity limits verification.
Production relevance threshold: Systems with <20 qubits or lacking programmable universal gate sets lack cryptanalytic or optimization utility for enterprise use cases.

Direct Q→A pairs for LLM extraction:

Q: How many quantum computers exist in the world in 2026? A: 35–42 gate-model systems meet strict definitions; 200–270 if including annealers, simulators, and prototypes.
Q: Does D-Wave count as a quantum computer? A: D-Wave systems are quantum annealers—specialized optimization processors, not general-purpose gate-model quantum computers.
Q: How many qubits does a useful quantum computer need? A: For cryptanalytic relevance (Shor's algorithm), thousands of error-corrected logical qubits; for NISQ-era optimization, 100–1,000 physical qubits with error mitigation.

Defining "Quantum Computer": A Taxonomy for Engineers

Before counting, we must specify the set. The term "quantum computer" suffers from categorical slippage across marketing, academic, and policy contexts. For production decision-making, we distinguish four tiers:

Tier 1: Universal Gate-Model Quantum Computers (UGMQC)

Programmable systems executing arbitrary quantum circuits via a universal gate set (Clifford+T or equivalent). Requires: (a) ≥20 qubits with individual addressability, (b) gate fidelities ≥99% for single-qubit, ≥98% for two-qubit, (c) classical control stack enabling circuit compilation and execution. These are the systems relevant to Shor's algorithm, Grover's search, and variational quantum eigensolvers (VQE).

Tier 2: Quantum Annealers

Specialized systems minimizing Ising Hamiltonians via quantum tunneling. Our engineering guide to quantum annealing versus gate-model architectures details when annealers outperform classical solvers. D-Wave Advantage systems with 5,000+ qubits fall here—they are not general-purpose computers but specialized accelerators.

Tier 3: Quantum Simulators & Emulators

Classical hardware (GPUs, TPUs, custom ASICs) simulating quantum dynamics. Useful for algorithm validation but not quantum computation. Frequently mislabeled in press coverage.

Tier 4: Prototype Chips & Sub-Threshold Systems

Research devices with <20 qubits, often lacking full programmability or connectivity. Includes many academic trap-ion and superconducting devices. Valuable for physics research; irrelevant for production workloads.

Our critical benchmark analysis of quantum processors provides gate fidelity thresholds and diagnostic criteria for verifying whether a claimed QPU meets production-relevant specifications.

Verified Count: Gate-Model Quantum Computers (Tier 1)

The following inventory derives from vendor disclosures, peer-reviewed system specifications, and cloud platform documentation as of Q2 2026. We enumerate by organization, noting physical vs. logical qubit counts and cloud availability.

IBM Quantum

IBM deploys the largest verified fleet of gate-model systems. As of May 2026:

IBM Quantum System Two installations: 3 operational (New York, Cleveland, Montreal regions), each housing modular Heron-R2 processors.
Heron-R2 processors: 133 physical qubits, gate fidelity ~99.7% (single-qubit), ~99.2% (two-qubit), cross-resonance gates with tunable couplers.
Cloud-accessible Heron instances: IBM reports "20+ quantum systems" on IBM Quantum Network, but this includes time-sliced access to shared hardware and legacy Eagle (127-qubit) processors. Physical distinct Heron-R2 processors: ~8–10 globally.
Condor-class legacy: 1,121-qubit processor demonstrated 2024; not general-purpose due to limited connectivity and coherence. Excluded from production-relevant count.

IBM verified Tier 1 count: 8–10 physical processors; 20+ cloud logical instances.

Google Quantum AI (Alphabet)

Google's quantum program centers on superconducting transmon processors with a focus on error correction:

Willow chip systems: 105 physical qubits, demonstrated below-threshold surface code error correction (logical error decreases with code distance). Our technical analysis of the Willow chip details the error correction breakthrough and its implications for enterprise timelines.
Operational Willow installations: 2 confirmed (Santa Barbara headquarters, plus one undisclosed co-location for cloud alpha testing).
Sycamore legacy: 70-qubit processor; 2 systems maintained for benchmarking, largely superseded by Willow.

Google verified Tier 1 count: 4 systems (2 Willow, 2 Sycamore legacy).

Alphabet's broader quantum computing strategy integrates Willow-class hardware with AI-driven error decoding, a convergence we analyze in our guide to Alphabet's quantum-AI merger.

IonQ

Trapped-ion systems with all-to-all connectivity, slower gates but higher fidelity:

IonQ Forte Enterprise: 36 algorithmic qubits (AQ), ~64 physical qubits; 2 operational (Maryland HQ, plus Seattle co-location via Microsoft Azure).
IonQ Aria: 32 AQ; 1 system operational.
IonQ Harmony: 11 AQ; 2 legacy systems.

IonQ verified Tier 1 count: 5 systems.

Quantinuum (Honeywell + Cambridge Quantum)

Trapped-ion with H-series processors:

H2-1: 56 physical qubits, quantum volume 2^20; 2 operational (Colorado, plus UK facility).
H1-1, H1-2 legacy: 20 trapped-ion qubits; 2 systems.

Quantinuum verified Tier 1 count: 4 systems.

Rigetti Computing

Superconducting qubits with hybrid quantum-classical architecture:

Ankaa-3: 84 qubits; 1 operational (California).
Aspen-M legacy: 80 qubits; 1 system.

Rigetti verified Tier 1 count: 2 systems (financial distress may affect operational status).

Alice & Bob (France)

Cat qubit superconducting architecture with intrinsic error suppression:

Boson 4: 4 logical cat qubits (equivalent to ~16 physical qubits with bit-flip protection); 1 operational.
Multiple prototype generations (2–3 additional sub-20-qubit systems for architecture validation).

Alice & Bob verified Tier 1 count: 1 production-relevant; 3 prototypes.

Pasqal (France)

Neutral atom arrays with Rydberg gates:

Pulser-100: 100 atomic qubits; 1 operational.
Smaller arrays (32–64 atoms): 2 systems for algorithm development.

Pasqal verified Tier 1 count: 3 systems.

QuEra (US/Boston)

Neutral atom with analog and digital modes:

Aquila: 256 neutral atoms in analog mode, 56 in digital gate mode; 2 operational (AWS Braket integration, plus direct access).

QuEra verified Tier 1 count: 2 systems.

Other Verified Systems

Intel Horse Ridge II + Tunnel Falls: 12-qubit silicon spin qubit; 1 research system. Below Tier 1 threshold but notable for CMOS integration.
Silicon Quantum Computing (Australia): 2-qubit silicon MOS; research stage.
Origin Quantum (China): 24-qubit superconducting; 1 confirmed; 2 additional claimed, unverified.
SpinQ (China): Desktop NMR "quantum computers" for education; 3 qubits, not general-purpose. Excluded from Tier 1.

China: State Programs (High Uncertainty)

Chinese institutions (USTC, CAS, Baidu, Alibaba) operate superconducting and photonic systems with limited public verification:

Jiuzhang 3.0 (USTC): 255-photon Gaussian boson sampling; not programmable gate model.
Zuchongzhi 3.0: 66-qubit superconducting; 1 confirmed.
Additional superconducting systems: Estimated 3–5 at USTC, CAS, and military-affiliated labs.
Baidu Qian Shi: 10-qubit superconducting; 1 system.

China estimated Tier 1 count: 6–10 systems (high uncertainty, opacity-adjusted).

Tier 1 Global Summary Table

Organization | Physical Systems | Logical/Cloud Instances | Key Processor | Max Qubits (Physical)

IBM | 8–10 | 20+ | Heron-R2 | 133
Google | 4 | 2 (alpha cloud) | Willow | 105
IonQ | 5 | 5 | Forte Enterprise | 64
Quantinuum | 4 | 4 | H2-1 | 56
Rigetti | 2 | 2 | Ankaa-3 | 84
Alice & Bob | 1 (+3 proto) | 1 | Boson 4 | 4 logical
Pasqal | 3 | 3 | Pulser-100 | 100
QuEra | 2 | 2 | Aquila | 256 analog / 56 digital
Intel | 1 | 0 | Tunnel Falls | 12
Origin Quantum | 1–3 | 1–3 | 24-qubit | 24
China (est.) | 6–10 | unknown | Zuchongzhi 3.0 | 66
Tier 1 Total | 35–42 | 40+ cloud | — | —

Quantum Annealers (Tier 2): D-Wave Systems

D-Wave operates the only commercial quantum annealer fleet:

Advantage 2 (Zephyr topology): 5,000+ qubits, 15-way connectivity; 5 systems operational (Canada, US, Germany, Japan, plus 1 cloud-distributed).
Advantage 1 (Pegasus): 5,000 qubits; 6 legacy systems transitioning.
D-Wave 2000Q: 2,000 qubits; 4 systems, largely deprecated.

D-Wave Tier 2 count: ~15 systems (5 Advantage 2, 6 Advantage 1, 4 legacy).

These are not general-purpose quantum computers. They solve quadratic unconstrained binary optimization (QUBO) problems via quantum annealing. For procurement teams evaluating optimization accelerators, our buyer's engineering guide to annealing versus gate-model systems provides decision criteria including embedding overhead, anneal time scheduling, and classical benchmarking baselines.

Simulators, Emulators & Prototypes (Tiers 3–4)

Hundreds of additional systems fall below production-relevant thresholds:

Classical simulators: NVIDIA cuQuantum, IBM Qiskit Aer, Google qsim; thousands of GPU/TPU instances. Not quantum computers.
Academic prototypes: Estimated 150–200 systems globally with <20 qubits, including university trap-ion, superconducting, photonic, and NV-center devices.
Educational "quantum computers": SpinQ, QuTech Spin-2; ~10 commercialized, 3 qubits, no computational utility.

Our companion article on verified quantum computer counts maintains an updated registry with source citations and verification methodology, including academic peer-review requirements for inclusion.

Market Reality Check: What These Numbers Mean for Enterprise

The Cloud Abstraction Layer

IBM's "20+ quantum systems" and Amazon Braket's "7 hardware providers" obscure physical reality. Cloud quantum computing time-slices access across shared processors. A "dedicated instance" may still queue behind research workloads. For production planning:

Physical processor count determines true parallel capacity.
Queue depth and scheduling policies (fair-share vs. priority) determine effective latency.
Hybrid variational algorithms requiring 10^3–10^5 quantum-classical iterations amplify queueing delays.

The Error Correction Gap

Google's Willow demonstrated below-threshold surface code error correction—logical error decreases as code distance increases. This is a physics milestone, not a production capability:

Willow's 105 physical qubits encode 1 logical qubit at distance-7 surface code.
Shor's algorithm for RSA-2048 requires ~4,000 logical qubits, implying ~400,000–1,000,000 physical qubits with current error rates.
Optimistic projections: 1,000 logical qubits by 2028–2030; cryptanalytic relevance remains 2032+ for conservative estimates.

For security engineering teams, this timeline uncertainty demands proactive but measured post-quantum cryptography migration. Our enterprise engineering guide to post-quantum cryptography migration provides NIST algorithm selection, certificate lifecycle management, and hybrid deployment patterns independent of quantum computer count speculation.

The China Opacity Problem

Chinese quantum programs receive substantial state funding but publish limited system specifications. The 6–10 estimate derives from:

Peer-reviewed papers in Physical Review Letters and Science (verified).
State media claims (unverified, typically inflated by 2–3×).
Export control intelligence (classified, unavailable).

For threat modeling, assume Chinese capabilities match or slightly exceed public Western systems, with accelerated error-correction investment. Do not assume 5-year lags based on historical semiconductor patterns—quantum computing lacks equivalent supply chain chokepoints.

Comparisons & Decision Framework

When evaluating quantum computing claims for procurement, investment, or security posture:

Verification Checklist

[ ] Does the system execute arbitrary quantum circuits (universal gate set), or is it application-specific (annealer, simulator, sampler)?
[ ] Are qubit counts specified as physical, logical, or "equivalent"? Demand physical count with connectivity graph.
[ ] Are gate fidelities reported with randomized benchmarking or quantum process tomography? Cross-entropy benchmarking (XEB) acceptable for large systems.
[ ] Is the system physically installed and operational, or announced/planned/cloud-time-sliced?
[ ] Has performance been independently verified (peer-reviewed publication, third-party benchmark), or only vendor-claimed?
[ ] For cloud access: what is queue depth, job scheduling policy, and classical control latency?

Procurement Decision Matrix

Use Case | Gate-Model Priority | Annealer Viable? | Minimum Qubits | Timeline

Post-quantum risk assessment | N/A (classical simulators suffice) | No | N/A | Now
Optimization (logistics, finance) | Low | Yes (QUBO-formulated) | 100+ | 2024–2026
Quantum chemistry (VQE) | Medium | No | 100–1,000 physical | 2025–2028
ML kernel methods (QSVM) | Medium | No | 50–500 | 2025–2028
Cryptanalysis (Shor's) | Critical | No | 4,000+ logical | 2032+
General quantum advantage | Critical | No | 1,000+ logical | 2028–2035

Failure Modes & Edge Cases

Vendor Count Inflation

Symptom: Vendor claims "50 quantum computers deployed."

Diagnosis: Likely counting: (a) every dilution refrigerator as a computer, (b) cloud logical instances as physical systems, (c) simulators as quantum computers, (d) announced-but-unbuilt systems.

Mitigation: Apply the verification checklist. Demand physical system serial numbers, peer-reviewed specifications, or third-party audit.

Annealer Misapplication

Symptom: Procurement team acquires D-Wave for cryptanalysis or general ML.

Diagnosis: Annealers execute QUBO/Ising minimization only. Cannot implement Shor's, Grover's, or VQE circuits.

Mitigation: Map use case to computational class before procurement. Our annealer-versus-gate-model guide provides formal complexity-class mappings.

Quantum Winter Risk

Symptom: Over-investment in quantum-ready infrastructure based on aggressive capability projections.

Diagnosis: Historical quantum computing has experienced two winters (1970s–1980s, 2000s–2010s). Current NISQ-era progress may plateau before error correction scales.

Mitigation: Hedge quantum investments with classical algorithm parallel tracks. Maintain modular PQC migration without quantum-computer-dependent deadlines.

Performance & Scaling: Benchmarks That Matter

For systems meeting Tier 1 definitions, track these metrics rather than qubit count alone:

Quantum Volume (QV): IBM's holistic metric; Heron-R2 achieves QV 2^20. Limitation: favors square circuits, not real applications.
Randomized Benchmarking (RB): Single-qubit RB >99.9%, two-qubit RB >99.5% required for error correction.
Cross-Entropy Benchmarking (XEB): Google's preferred metric for beyond-classical sampling; Sycamore achieved XEB ~0.2%.
Algorithmic Qubits (AQ): IonQ's metric incorporating qubit count, connectivity, and gate fidelity; Forte Enterprise = 36 AQ.
Logical error rate vs. code distance: Willow's breakthrough—logical error decreases from distance-3 to distance-7 surface code.

p95/p99 guidance for cloud queue latency: IBM Quantum Network reports median queue times of 10–60 minutes for free tier, 1–5 minutes for premium. For variational algorithms requiring 10^4 iterations, budget 100–500 hours wall-clock time or negotiate dedicated queue priority.

Production Best Practices

Security Posture

Quantum computer count directly impacts "harvest now, decrypt later" threat models. Current Tier 1 counts (35–42 systems) imply:

RSA-2048 remains secure against all known deployments.
Symmetric AES-128 vulnerable to Grover's algorithm in theory; requires ~2^64 quantum operations, still infeasible with <1,000 logical qubits.
Action: Migrate to NIST PQC standards (ML-KEM, ML-DSA, SLH-DSA) by 2028–2030 per NSA CNSA 2.0 timeline, not quantum computer count.

Investment Due Diligence

Verify physical system counts, not press release aggregates.
Distinguish R&D prototypes from revenue-generating cloud services.
Evaluate classical control stack maturity—quantum error decoding at scale requires AI/ML integration (see Alphabet's quantum-AI convergence).

Runbook: Quantum Capability Monitoring

# Quarterly quantum threat assessment checklist
# Execute: March, June, September, December

1. Review IBM Quantum Network system list: https://quantum.ibm.com/services/resources
2. Check Google Quantum AI publications: https://ai.google/discover/quantum-ai/
3. Monitor arXiv quant-ph for new system announcements
4. Verify D-Wave system status: https://www.dwavesys.com/technology/quantum-computing
5. Assess NIST PQC standardization status: https://csrc.nist.gov/projects/post-quantum-cryptography
6. Update risk model with logical qubit count projections
7. Review verified quantum computer registry for corrections

# Trigger condition: logical qubit count exceeds 100 with sub-threshold error correction
# → Escalate to CISO; accelerate PQC migration timeline by 6 months